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Description

Clash: a functional hardware description language - GHC frontend.

Clash is a functional hardware description language that borrows both its syntax and semantics from the functional programming language Haskell. The Clash compiler transforms these high-level descriptions to low-level synthesizable VHDL, Verilog, or SystemVerilog.

Features of Clash:

  • Strongly typed, but with a very high degree of type inference, enabling both safe and fast prototyping using concise descriptions.

  • Interactive REPL: load your designs in an interpreter and easily test all your component without needing to setup a test bench.

  • Higher-order functions, with type inference, result in designs that are fully parametric by default.

  • Synchronous sequential circuit design based on streams of values, called Signals, lead to natural descriptions of feedback loops.

  • Support for multiple clock domains, with type safe clock domain crossing.

This package provides:

  • Clash Compiler binary using GHC/Haskell as a frontend

Prelude library: https://hackage.haskell.org/package/clash-prelude

clash-ghc - Haskell/GHC front-end for the Clash compiler

  • See the LICENSE file for license and copyright details
  • Contains code from the GHC compiler, see the LICENSE_GHC file for license and copyright details pertaining to that code.

Clash - A functional hardware description language

Clash is a functional hardware description language that borrows both its syntax and semantics from the functional programming language Haskell. The Clash compiler transforms these high-level descriptions to low-level synthesizable VHDL, Verilog, or SystemVerilog.

Features of Clash:

  • Strongly typed (like VHDL), yet with a very high degree of type inference, enabling both safe and fast prototying using consise descriptions (like Verilog).

  • Interactive REPL: load your designs in an interpreter and easily test all your component without needing to setup a test bench.

  • Higher-order functions, with type inference, result in designs that are fully parametric by default.

  • Synchronous sequential circuit design based on streams of values, called Signals, lead to natural descriptions of feedback loops.

  • Support for multiple clock domains, with type safe clock domain crossing.

Open-source community

Clash benefits from an active community. Whether you need a question answered or want to contribute to open-source features, browse the features below to make the most of Clash.

Metadata

Version

1.8.4

Platforms (76)

    Darwin
    FreeBSD
    Genode
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    MMIXware
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